PROJECT DETAILS
Our group developed an external I/O PCB that will directly connect to the MiniZed Development Board. The MiniZed Development Board used in CompE 470 Lab couples a single core ARM processor with an FPGA fabric. Students in this lab will develop Verilog code using Vivado Design Suite by Xilinx to program the FPGA of the MiniZed and complete various labs. The I/O PCB we have created allows students to focus on writing Verilog without having to worry about wiring individual components to the I/O pins of the MiniZed. The I/O PCB is operated by directly connecting it to the MiniZed Development Board (FPGA). Synthesized logic written in Verilog in Vivado Design Suite is then uploaded to the MiniZed to instantiate the inputs and outputs of the I/O PCB. These inputs and outputs can be customized to fit different project specifications by writing and synthesizing the Verilog code in Vivado Design Suite. Should this device be actually employed in CompE 470 Lab, we have written a guide that will walk the user through properly setting up Vivado Design Suite to interface with the MiniZed and I/O PCB.
I/O PCB